UNIVAC 1050
MANUFACTURER
UNIVAC Division, Sperry Rand Corp.
Photo by UNIVAC Division, Sperry Rand Corp.
APPLICATIONS
A general purpose subsystem employed mainly to
supplement the parallel processing capabilities of UNIVAC
III, UNIVAC 490 Real-Time and UNIVAC 1107 Thin Film
Memory Computing systems.
PROGRAMMING AND NUMERICAL SYSTEM
Internal number system Binary coded decimal
There are six bits plus one parity bit per character
Decimal digits/word Variable
Digits/instruction 30
Instructions/word Not word oriented
Instructions decoded 43
Arithmetic system Fixed point
Instruction type One address
Number range From +9999999999999999 to
- 9999999999999999
Instruction word format
+-----------+-----------+------------+-----------+-----------+
| lst | 2nd | 3rd | 4th | 5th |
| CHARACTER | CHARACTER | CHARACTRER | CHARACTER | CHARACTER |
+---------+-+-----+----++------------+-----------+-----------+
| 30 26 | 25 23 | 22 | 21 7 | 6 1 |
| a | b | c | d | e |
+---------+-------+----+-------------------------+-----------+
a. Operation Code d. Main Store Address
b. Index Register e. Detail Field
c.Reserved
The first five bits of the instruction, bits 30 through 26, are
the operation code. The operation code specifies the
function which the Central Processor is to execute.
Bits 25 through 23 are the index register (X) portion of the
instruction. The concept of indexing is discussed below
under "Registers and B-Boxes".
Bit 22 is reserved. It must always be zero.
Bits 21 through 7 are the main store address (M) portion of
the instruction. This portion specifies the store address of
the operand. If an operand is
greater than one character in length, the M portion refers to the
least significant character of the operand. There are two exceptions
to this rule: The Zero Suppress and the Block Transfer instructions.
Because of the way these two instructions operate, the M portion
specifies the most significant character of the operand.
Bits 6 through 1 comprise the detail field. The contents of the
detail field vary with each instruction. Depending on the
instruction, the detail field may specify operand length, tetrad
number, a comparison indicator, an arithmetic register, or number of
bits. The function of the detail field is discussed thoroughly in the
description of the UNIVAC 1050 instruction repertoire.
Automatic coding.
PAL Assembly System, Co-ordination Routine and Relocatable Relative
Loader, Source Code Library, Input/Output Library, Patch Assembler
Registers and B-Boxes
Two arithmetic registers of 16 characters each
Seven index registers. An index register contains 15 bits. The
primary function of an index register is to vary the operand address
specified in an instruction. If an index register is specified in an
instruction, the effective address of the instruction is determined
by adding the contents of the specified index register to the address
specified by the M portion of the instruction. However, neither the
contents of the index register nor the M portion are changed, except
in some cases of the Fix Tetrad instruction. Location and length of
operands are specified by each instruction. The first 256 characters
of storage are grouped into 64 four-character fields (tetrads) and
can be so addressed.
To illustrate indexing, assume an instruction which stores a value in
location 100. Assume that the instruction specifies indexing by index
register 1, which contains the value 20. When the instruction is
executed, the value being stored is placed in 100+20, or 120. After
the instruction has been executed, the M portion of the instruction
still specifies location 100, and'index register 1 still contains 20.
The value of indexing is that one set of instructions may be made to
process several similar items of data located in different areas of
main store. Instead of writing as many sets of processing
instructions as there are items of data in store, the programmer need
write only one set of instructions using index register modification.
In order to perform the same processing on several items of data
located in different parts of store, all that is necessary is to
change the value of the index register.
Almost all instructions may specify index register modification. If
indexing is not required in an instruction, the index register
portion of the instruction must contain binary zeroes.
ARITHMETIC UNIT
Incl. Stor. Access Excl. Stor. Access
Microsec Microsec
Add 270 (a+b=c) 5-digit sum 117 (5 digit sum)
Mult 567 (axb=c) 6-digit prod. 229 (6 digit prod)
Div 1,735 (a/b=c) 5-digit quotient 1,438(5 digit quotient)
Arithmetic mode Serial
This system is parallel by bit and serial by
character.
Timing Synchronous
Operation Concurrent
STORAGE
No. of Access
Medium Alphan Char. Microsec
Core 8,192 - 32,768 4.5/Char
Regarding core memory, basic system includes 8,192 character or digit
positions of storage which may be expended to 32,768 in increments of
4,096 positions.
The UNIVAC 1050 Central Processor has from 2 to 8 modules of main
store, each module comprising 4,096 positions or locations. Each
position has its own unique address, and each position is directly
addressable.
Each location contains six information bits and one parity bit. The
parity bit is of no concern to the programmer, as it is used only by
the hardware.
Program instructions and data are contained in main store. Each
instruction occupies five consecutive locations. Instructions are
always represented internally in binary form.
Magnetic tape
2 Model IIIA units or 2 Model IIIC units may be connected. (See chart
for additional information).
INPUT
Medium Speed
Uniservo IIIA
Uniservo IIIC
Punched Card Reader 1,000 cards/min
One card reader per system.
OUTPUT
Medium Speed
Uniservo IIIA
Uniservo IIIC
Card Punch Unit 300 cards/min
One card punch per system.
Printer 700-922 lines/min
Single spaced alphanumeric data printer, 128 characters/line; one
printer/system.
The system may include two IIIA Tape Units or two IIIC Tape Units.
Combinations of IIIA and IIIC Tape Units are not permitted.
The printer prints 700 lines/min using all 63 characters on the print
drum.
The printer prints 922 lines/min using 40 contiguous characters on
the print drum.
CHECKING FEATURES
Tape Units - Read after Write check is included.
Fixed -Card Reader - Solar cells sensing units are checked before
each card is read.
Fixed -Card Punch - Post-Punch check read station enables positive
hole count check of data that was previously punched.
Fixed Parity checking is also employed throughout the system as well
as decimal overflow, and check for improper division.
REMARKS
The UNIVAC 1050 Data Processing System consists of three physical
categories: Central Processor modules, input/output equipment, and
magnetic tape handling equipment.
The Central Processor unit is composed of two modules placed side by
side to form one composite unit. These modules are the Central
Processor Unit and the Central Processor Power Supply Unit.
The input/output equipment consists of the following
physically separated units: High-Speed Reader High-Speed
Printer Card-Punch Unit
The magnetic tape equipment consists of the following
modules: UNISERVO Synchronizer UNISERVO Power
Supply Unit UNISERVO IIIA or UNISERVO IIIC Tape
Handling Units
The customer is responsible for the installation of the AC
power distribution system to the point of connection to the
UNIVAC 1050 units. A 25% safety factor must be added to
the total power requirements to provide for the utilization of
convenience receptacles located on the individual units.
The composite unit composed of the Central Processor Unit
and the Central Processor Power Supply Unit requires a
208-Volt, 1-Phase, 60-Cycle, 3-Wire (plus a separate
grounding conductor) cable. Power connects to the Central
Processor Power Supply Unit. The Central Processor Unit
receives power from the Central Processor Power Supply
Unit.
The High-Speed Reader, High-Speed Printer and Card
Punch Unit receive power from the Central Processor
Power Supply.
The magnetic tape equipment requires a 208-Volt, 1-Phase,
60-Cycle, 3-Wire (plus a separate grounding conductor)
cable. Power connects to the UNISERVO Power Supply
Unit.
PERSONNEL REQUIREMENTS
One 8-Hour Shift
Supervisors 2
Analysts 1
Programmers 3
Librarians 1
Operators 1
In-Output Oper 1
Training will be made available to all users.
ADDITIONAL FEATURES AND REMARKS
Printer has a buffer. Card Reader, Punch, Printer and Tape
Control Unit have separate input/output channels.
Automatic interrupt feature makes it possible to
simultaneously process multiple applications. Simultaneous
operations are: read cards, punch, process and print; read
tape, process and print; write tape, process and print.
UNIVAC 1050 is a solid state, character addressable
computing sub-system. It has a basic magnetic core memory
of 8,192 six-bit alphanumeric characters that can be
expanded in modules of 4,096 characters to a maximum
capacity of 32,768. The 1050 was designed to supplement
the parallel processing capabilities of the UNIVAC III, 490
Real Time, and 1107 Thin Film Memory computing
systems.
Auxiliary off line functions include conversion of
data from punched cards to magnetic tape and from
magnetic tape to punched cards or printed hard copy.
A program interrupt technique allows the concurrent
operation of two input/output programs. Modular
construction of the 1050 system permits the user to
select only those components needed to fill his
requirements. Rental price ranges from $5,700 to
$10,850 per month depending on configuration.
Purchase prices range from approximately $285,000
to approximately $500,000. Delivery is one year from
receipt of order.